About QuBench

About QuBench

QuBench 2026 provides a focused forum for advancing rigorous, reproducible, and scientifically meaningful evaluation practices across the quantum computing stack. Led by JIJ Inc. and co-organized with partners from industry, startups, HPC centres, national laboratories, academia, and non-profit/community organizations, the workshop aims to bring together diverse perspectives from across the quantum and quantum-HPC ecosystem.

As quantum systems continue to evolve, fair comparison across hardware platforms, simulators, compilers, runtimes, and application workflows increasingly depends on transparent benchmarking methodologies, validated assumptions, and careful interpretation of performance claims. The workshop will bring together researchers, engineers, and practitioners to discuss benchmark design, simulator and emulator validation, compiler- and runtime-aware metrics, quantum-HPC performance evaluation, application-oriented benchmarking, and resource estimation from near-term to fault-tolerant regimes.

Through invited talks, peer-reviewed paper presentations, and community discussion, QuBench 2026 aims to identify methodological gaps, promote reproducible reporting practices, and support the development of shared benchmark tasks, open artifacts, and evaluation roadmaps for the broader quantum computing and quantum-HPC communities.

About the Main Organizer

JIJ Inc. develops technologies and solutions at the intersection of quantum computing, optimization, and high-performance computing. As the main organizer of QuBench 2026, JIJ works together with its co-organizers and community partners to support transparent, reproducible, and practically meaningful benchmarking practices for the quantum computing ecosystem.

Objectives

1. Promote rigorous quantum benchmarking practices
   Establish clear principles for designing, running, and interpreting credible benchmarks across quantum hardware, simulators, software stacks, and Quantum-HPC systems.

2. Advance reproducibility and transparent reporting
   Encourage reporting practices that clearly document compilation choices, simulator settings, noise assumptions, shot budgets, error mitigation methods, and post-processing procedures.

3. Strengthen simulator and emulator validation
   Develop shared understanding of how to assess the correctness, scalability, fidelity, and performance trade-offs of quantum simulators and emulators against realistic hardware behavior.

4. Bridge hardware, software, compiler, and HPC perspectives
   Bring together researchers and practitioners across the quantum stack to discuss how benchmarking assumptions interact across devices, compilers, runtimes, applications, and HPC infrastructure.

5. Clarify best practices for resource estimation
   Examine methodologies for estimating logical and physical qubit requirements, runtime, error-correction overheads, and architecture-dependent assumptions from NISQ to fault-tolerant regimes.

6. Build a sustained benchmarking community
   Lay the groundwork for future collaborations, shared benchmark tasks, reporting checklists, open artifacts, benchmark repositories, and roadmap activities for the quantum ecosystem.